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1 of 19 101000 features high slew rate: 10v/ s high gain bandwidth: 6.5 mhz supply voltage range 2.5 to 5.5v rail-to-rail output swing 1.75 ma supply current per channel ordering information part number description DS4812 8-pin dip DS4812s 8-pin soic DS4812u 8-pin -sop DS4812x 8-bump csp for mechanical dimensions see web site. packages/pinouts a - + b - + aout ain- ain+ gnd vdd bout bin- bin+ 1 2 3 45 6 7 8 300-mil dip 150-mil soic 118-mil -sop a - + b - + aout ain- ain+ gnd vdd bout bin- bin+ 1 2 3 4 5 6 7 8 8-bump csp description the DS4812 bicmos dual operational amplifier combines high slew rate and rail-to-rail output swing. the device provides 10v/ s of slew rate and 6.5 mhz of bandwidth while only consuming 1.5 ma of supply current per channel. ideal low voltage bifet substitute for low gain, high speed applications. www.dalsemi.com DS4812 low voltage, high slew rate, rail-to-rail dual op-amp preliminary
DS4812 2 of 19 absolute maximum ratings supply voltage, v dd (see note 1)............5.5v differential input voltage (see note 2).... v dd input voltage range, v i (see note 1) .......-0.3v to v dd input current, i dd ..................................... 4 ma output current, i o .................................... 50 ma total current into v dd .............................. 50 ma total current out of gnd......................... 50 ma duration of short-circuit current (see note 3) unlimited operating temperature ............................0 o c to +70 o c storage temperature ................................-55 o c to +125 o c soldering temperature.............................see j-std-020a specification notes: 1. relative to gnd. 2. non-inverting input relative to inverting input. excessive current flows when input is brought below gnd - 0.3v. 3. the output may be shorted to either supply. temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. recommended operating conditions parameter symbol min typ max units notes supply voltage v dd 2.5 5.5 v 1 input voltage range v i 0v dd - 1.7 v 1 common-mode input voltage v cm 0v dd - 1.7 v free-air operating temperature t a 070 o c notes: 1. voltage referenced to gnd.
DS4812 3 of 19 electrical characteristics conditions: (t a : 0 c ? 70 c. v dd = 3.0v) parameter symbol min typ max units notes input offset voltage (v ic = 0.5v, r s = 50 ? , v out = 1.5v) v io 15mv temperature coefficient of input offset voltage (v ic = 0.5v, r s = 50 ? , v out = 1.5v) v io 10 v/ c input offset current (v ic = 0.5v, r s = 50 ? , v out = 1.5v) i io 1 500 pa input bias current (v ic = 0.5v, r s = 50 ? , v out = 1.5v) i ib 2 500 pa common-mode input voltage range |v io | 10mv v icr 0 1.3 v high level output voltage (i oh = -0.5 ma) v oh 2.5 2.8 v low level output voltage (i ol = 0.5 ma) v ol 0.15 0.5 v large signal differential voltage amplification (v ic = 0.5v, r l = 10 k ? , 1v v o 2v) a vd 60 68 db common mode input capacitance c i(c) 4pf common mode rejection ratio (0v v ic 1.0v, v o = 1.5v) cmrr 40 50 db supply voltage rejection ratio (3v v dd 5v, v ic = v dd /2 ? 1v, no load) k svr 70 80 db amplifier supply current (per channel) (v o = 1.5v, no load) i dd 1.5 2.5 ma slew rate at unity gain (c l = 50 pf) sr 5 7.5 v/ s unity gain bandwidth (c l = 50 pf) ugbw 5.0 mhz phase margin at unity gain (c l = 50 pf) m 54 degree gain margin (c l = 50 pf) 6db
DS4812 4 of 19 electrical characteristics cont. conditions: (t a : 0 c ? 70 c. v dd = 5.0v) parameter symbol min typ max units notes input offset voltage (v ic = 1.5v, r s = 50 ? , v out = 2.5v) v io 15mv temperature coefficient of input offset voltage (v ic = 1.5v, r s = 50 ? , v out = 2.5v) v io 10 v/ c input offset current (v ic = 1.5v, r s = 50 ? , v out = 2.5v) i io 1 500 pa input bias current (v ic = 1.5v, r s = 50 ? , v out = 2.5v) i ib 2 500 pa common-mode input voltage range |v io | 10 mv v icr 0 3.3 v high level output voltage (i oh = -1.0 ma) v oh 4.5 4.8 v low level output voltage (i ol = 1.0 ma) v ol 0.15 0.5 v large signal differential voltage amplification (v ic = 1.5v, r l = 10 k ? , 1.5v v o 3.5v) a vd 60 72 db common mode input capacitance c i(c) 4pf common mode rejection ratio (0v v ic 2.7v, v o = 2.5v) cmrr 45 55 db supply voltage rejection ratio (3v v dd 5v, v ic = v dd /2 ? 1v, no load) k svr 70 80 db amplifier supply current (per channel) (v o = 2.5v, no load) i dd 1.75 2.5 ma slew rate at unity gain (c l = 50 pf) sr 7 10 v/ s unity gain bandwidth (c l = 50 pf) ugbw 6.5 mhz phase margin at unity gain (c l = 50 pf) m 46 degree gain margin (c l = 50 pf) 4db
DS4812 5 of 19 figure 1.0 figure 2.0 distribution of DS4812 input offset voltage 0% 5% 10% 15% 20% 25% 30% -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 v io - input offset voltage - mv percentage of amplifiers - % v dd = 3.0 v r l = 10k t a = 25 o c distribution of DS4812 input offset voltage 0% 5% 10% 15% 20% 25% 30% 35% -2 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 1.6 2 v io - input offset voltage - mv percentage of amplifiers - % v dd = 5.0 v r l = 10k t a = 25 o c
DS4812 6 of 19 figure 3.0 figure 4.0 input offset voltage vs common-mode input voltage -5 -4 -3 -2 -1 0 1 2 3 4 5 -0.5 0 0.5 1 1.5 2 v ic - common-mode input voltage - v v io - input offset voltage - m v v dd = 3.0 v t a = 25 o c input offset voltage vs common-mode input voltage -5 -4 -3 -2 -1 0 1 2 3 4 5 -0.500.511.522.533.54 v ic - common-mode input voltage - v v io - input offset voltage - m v v dd = 5.0 v t a = 25 o c
DS4812 7 of 19 figure 5.0 figure 6.0 distribution of DS4812 input offset voltage temperature coefficient 0% 5% 10% 15% 20% -40-35-30-25-20-15-10-5 0 5 10152025303540 v io - temperature coefficient - uv/ o c percentage of amplifiers - % v dd = 3.0 v r l = 10k t a = 25 o c distribution of DS4812 input offset voltage temperature coefficient 0% 5% 10% 15% 20% -40-35-30-25-20-15-10-5 0 5 10152025303540 v io - temperature coefficient - uv/ o c percentage of amplifiers - % v dd = 5.0 v r l = 10k t a = 25 o c to 85 c to 85 c
DS4812 8 of 19 figure 7.0 figure 8.0 high-level output voltage vs high-level output current 0 0.5 1 1.5 2 2.5 3 0.00 0.50 1.00 1.50 2.00 2.50 i oh - high-level output current - ma v oh - high-level output voltage - v -40 o c v dd = 3.0 v 0 o c 25 o c 85 o c 125 o c high-level output voltage vs high-level output current 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 i oh - high-level output current - ma v oh - high-level output voltage - v -40 o c v dd = 5.0 v 0 o c 25 o c 85 o c 125 o c
DS4812 9 of 19 figure 9.0 figure 10.0 low-level output voltage vs low-level output current 0.0 0.3 0.5 0.8 1.0 1.3 1.5 1.8 2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 i ol - low-level output current - ma v ol - low-level output voltage - v v dd = 3.0 v -40 o c 0 o c 125 o c 85 o c 25 o c low-level output voltage vs low-level output current 0.0 0.3 0.5 0.8 1.0 1.3 1.5 1.8 2.0 012345 i ol - low-level output current - ma v ol - low-level output voltage - v v dd = 5.0 v -40 o c 0 o c 125 o c 85 o c 25 o c
DS4812 10 of 19 figure 11.0 figure 12.0 short-circuit output current vs free-air temperature -5 -4 -3 -2 -1 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 t a - free-air temperature - o c i os - short-circuit output current - m a v dd = 3.0 v i osl i osh short-circuit output current vs free-air temperature -5 -4 -3 -2 -1 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 t a - free-air temperature - o c i os - short-circuit output current - m a v dd = 5.0 v i osl i osh
DS4812 11 of 19 figure 13.0 figure 14.0 large-signal differential voltage amplification and phase margin vs frequency -40 -20 0 20 40 100k 1m 10m 100m f - frequency - hz a vd - gain margin - d b -90 -45 0 45 90 phase margin - degrees v dd = 3.0 v t a = 25 o c r l = 10k c l = 50pf a vd phase large-signal differential voltage amplification and phase margin vs frequency -40 -20 0 20 40 100k 1m 10m 100m f - frequency - hz a vd - gain margin - d b -90 -45 0 45 90 phase margin - degrees v dd = 5.0 v t a = 25 o c r l = 10k c l = 50pf a vd phase
DS4812 12 of 19 figure 15.0 figure 16.0 common-mode rejection ratio vs frequency 0.0 20.0 40.0 60.0 80.0 100k 1m 10m f - frequency - hz cmrr - common-mode rejection ratio - db v dd = 5.0 v v dd = 3.0 v supply current vs supply voltage 0 1 2 3 4 5 00.511.522.533.544.55 v dd - supply voltage - v i dd - supply current - ma v ic = 30% v dd 85 o c 125 o c 25 o c 0 o c -40 o c
DS4812 13 of 19 figure 17.0 figure 18.0 supply-voltage rejection ratio vs frequency 0 20 40 60 80 1k 10k 100k 1m 10m f - frequency - hz k svr - supply-voltage rejection ratio - db v dd = 3.0v supply-voltage rejection ratio vs frequency 0 20 40 60 80 1k 10k 100k 1m 10m f - frequency - hz k svr - supply-voltage rejection ratio - db v dd = 5.0v
DS4812 14 of 19 figure 19.0 figure 20.0 voltage-follower small-signal pulse response 0.900 0.950 1.000 1.050 1.100 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 3.0 v a v = +1 r l = 10k c l = 50pf t a = 25 o c voltage-follower small-signal pulse response 2.400 2.450 2.500 2.550 2.600 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 5.0 v a v = +1 r l = 10k c l = 50pf t a = 25 o c
DS4812 15 of 19 figure 21.0 figure 22.0 voltage-follower large-signal pulse response 0.000 0.200 0.400 0.600 0.800 1.000 1.200 1.400 1.600 1.800 2.000 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 3.0 v a v = +1 r l = 10k c l = 50pf t a = 25 o c voltage-follower large-signal pulse response 1.500 1.750 2.000 2.250 2.500 2.750 3.000 3.250 3.500 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 5.0 v a v = +1 r l = 10k c l = 50pf t a = 25 o c
DS4812 16 of 19 figure 23.0 figure 24.0 inverting small-signal pulse response 0.900 0.950 1.000 1.050 1.100 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 3.0 v a v = -1 r l = 10k c l = 50pf t a = 25 o c inverting small-signal pulse response 2.400 2.450 2.500 2.550 2.600 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 5.0 v a v = -1 r l = 10k c l = 50pf t a = 25 o c
DS4812 17 of 19 figure 25.0 figure 26.0 inverting large-signal pulse response 0.000 0.200 0.400 0.600 0.800 1.000 1.200 1.400 1.600 1.800 2.000 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 3.0 v a v = -1 r l = 10k c l = 50pf t a =25 o c inverting large-signal pulse response 1.500 1.750 2.000 2.250 2.500 2.750 3.000 3.250 3.500 0 200 400 600 800 1000 t - time - ns v o - output voltage - v v dd = 5.0 v a v = -1 r l = 10k c l = 50pf t =25 o c
DS4812 18 of 19 figure 27.0 figure 28.0 phase margin vs load capacitance 0 10 20 30 40 50 60 70 1 10 100 1k 10k c l - load capacitance - pf phase margin - degrees v dd = 3.0 v r l = 10k t a = 25 o c r null = 0 r null = 50 r null = 20 r null = 10 ac r null c load r load + - +vdd/2 -vdd/2 gain margin vs load capacitance 0 2 4 6 8 10 12 1 10 100 1k 10k c l - load capacitance - pf gain margin - db v dd = 3.0 v r l = 10k t a = 25 o c r null = 50 r null = 0 r null = 10 r null = 20 ac r null c load r load + - +vdd/2 -vdd/2
DS4812 19 of 19 figure 29.0 unity-gain bandwidth vs load capacitance 0 1 2 3 4 5 6 1 10 100 1k 10k c l - load capacitance - pf unity-gain bandwidth - mhz v dd = 3.0 v r l = 10k t a = 25 o c

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